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MIT Alewife Project: Home Page Alewife is a large-scale multiprocessor that integrates both cache-coherent, distributed shared memory and user-level message-passing in a single integrated hardware framework. Each Alewife node consists of a 33 MHz Sparcle integer unit, an off-the-shelf FPU, 64 kbytes of direct-mapped cache, and 4 Mbytes of globally-shared main memory. The nodes communicate via ...
www.cag.lcs.mit.edu/alewife/
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